The demodulation of echo signal information primarily relies on the FFT. This paper proposes an FPGA-based signal processing unit scheme utilizing the split-radix FFT for efficient information demodulation of echo signal. In the original scheme, range dimension demodulation was performed by a DSP, while velocity dimension demodulation was conducted on a PC. However, the single-core DSP could not handle range dimension demodulation and data uploading in parallel, resulting in suboptimal real-time signal processing. Leveraging the large-scale parallel processing and flexible programmability of FPGA, this paper integrates both demodulations into the FPGA, achieving a parallel design for data processing and uploading, thereby enhancing realtime data processing. The split-radix FFT is crucial for achieving this functionality. By designing adaptive computation units and data flow control units, this paper improves the processing speed of the split-radix FFT. Compared to traditional structures, the proposed scheme reduces computation cycles by over 5.4%; compared to the improved split-radix FFT, it reduces computation cycles by over 2.31%. Closed-loop test results demonstrate that the integrated signal processing unit designed in this paper achieves a target signal-to-noise ratio (SNR) of 70 dB, effectively meeting the requirements for signal processing.