Design on response delay detection of CCD camera based on FPGA
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1.State Key Laboratory of Electronic Testing Technology, North University of China, Taiyuan 030051, China; 2.The Fifth Research Institute of China Ordnance Industry Group, Changchun 130000,China

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TN911.71

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    Abstract:

    In order to solve the problem that the response speed of CCD camera is very high when measuring high-speed projectile, but the response delay of camera is difficult to measure accurately, a method of CCD camera response delay detection based on FPGA is proposed.In this method, the trigger signal is divided into two channels: one is to trigger the high-speed camera directly; the other is to trigger the pulse laser light source by delaying the signal through FPGA module. The response delay of the camera is determined by changing the delay time and continuously judging whether the camera has captured the pulse laser.In this paper, the detection performance model of CCD camera is established, and the detection performance of the camera is analyzed. Finally, an experimental platform is built to verify the test method.The results show that the response delay of the camera is 0.5s.The response delay precision of the test is 0.1s, the detection speed is fast, the work efficiency is high, the operation is simple, and the result is accurate and stable.

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  • Received:
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  • Online: December 19,2024
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