Implementation of digital phosphor display algorithm based on SoC FPGA
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College of Physical Science and Technology, Central China Normal University, Wuhan 430079, China

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TM935.37

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    Abstract:

    Digital phosphor display technology provides a new perspective for electronic engineers. Compared with the traditional methods, it can reduce the dead time of waveform observations effectively. As the waveform capture rate is improved greatly, some occasional signals were more likely to be captured. This paper builds the threedimensional waveform on the platform of SoC FPGA, and implements the overall design in onchip system. The system uses FPGA to implement phosphor algorithm. By the means of onchip bus, FPGA connect to a hard core ARM CPU and forms an onchip system. Finally, we install a Qt app on the ARM to implement the display of waveform and the user interaction. After the test, the waveform capture rate of this system can be over 50000 wfms/s. This system could be used to observe some transient signals, which were hard to be seen in traditional methods.

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  • Received:
  • Revised:
  • Adopted:
  • Online: April 28,2016
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