To solve the problem of high-speed data transmission to a computer through LVDS interface during high-speed data acquisition. Using Xilinx Artix-7 series model XC7A35T FPGA as the main control chip, and based on USB3.0 interface chip design from LVDS to USB3.0 high-speed data transmission interface. LVDS transceiver built-in FPGA is used to receive LVDS data and write it to USB3.0 control transmission chip after caching by DDR3 to complete high-speed data transmission from LVDS interface to USB3.0 interface. After the data transmission test, the system can transmit the data received by the LVDS interface to the upper computer of computer through USB3.0. In the actual transmission process, the rate is kept at 250MB/s, which has the characteristics of simple hardware design and fast transmission speed.